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STTR Phase II: ADC Linearization using AI Methods

Dates: 10/01/2021-07/13/2023
Award Amount: $300,000

PI: Predrag Spasojevic

Abstract

Inherent non-linearities in ADC design and manufacturing create undesirable artifacts which reduce Signal-to-Noise Ratio (SNR) and worsen the Spurious-Free Dynamic Range (SFDR) of the ADC. Wideband ADCs are particularly susceptible to this, as they often have lower quantization resolution which makes these artifacts more prominent. Our research seeks to develop post-correction mechanisms for the non-linearities in such wideband, low-resolution ADCs to improve their SNR and SFDR.